搜索资源列表
led-and-digital-synchronous-beating
- verilog HDL语言程序,可以控制led和数码管同步跳动-verilog HDL language program, you can control led and digital synchronous beating
VERILOG---LED
- verilog代码,实现让十位按键的数字以十进制显示在LED灯上。-verilog code, which allows the digital keys to ten decimal display on the LED lights.
led
- 基于Verilog语言的过程描述法的流水灯设计,持续运行长时间。-Verilog language descr iption of the process water lamp design method based on continuous operation for a long time.
verilog
- 计时闹钟 报时 同时也包括了LED显示,-jishi naozhong
KEY_LED_FPGA_VerilogHDL
- FPGA按键与LED,Verilog HDL代码-FPGA buttons and LED, Verilog HDL code
colourful-led
- 其中为用verilog写的两个不用频率交替进行的流水灯设计,每个周期执行三次变换运行频率。-Where water lamp for use verilog to write two without frequency alternating design, execution three times per cycle frequency conversion run.
verilog-basic
- verilog基础编程,交通指示灯,时钟,LED等类容-Based programming verilog, traffic lights, clock, LED such as capacity
verilog-traffic
- 模拟一个简单的十字路口交通灯(各个只有红绿黄灯,没有转弯灯)。交通灯一共有4 个状态,一是倒计时60 秒,同时亮南北方向绿灯、东西方向红灯;二是倒计时5 秒,同时数码管闪烁显示‘0’,同时亮南北方向红灯、东西方向黄灯;三是倒计时30 秒,东西方向亮红灯、南北方向绿灯;四是倒计时5 秒,数码管闪烁显示‘0’,东西方向亮黄、南北方向红灯。四个状态循环就构成了一个简单的交通灯(未了降低难度,我们设计简化交通灯,与真实情况不太一样)。-Simulate a simple intersection tra
led
- LED呼吸灯硬件编程语言 Verilog 实现占空比变化LED灯缓慢点亮和熄灭的效果-LED Breathe
verilog-led
- 此程序是Verilog语言编写的一个流水灯程序,简单易行-This program is written in Verilog language a light water program, simple and feasible
verilog
- vivado的led灯的学习程序,有兴趣学习soc的可以下载-the program for vivado study on SOC
led
- 一个简单的LED控制程序,采用verilog编写-A simple LED control procedures, write verilog
array-led-display-chinese-characters
- 基于fpga驱动点阵显示汉字,4*4点阵,采用Verilog-array led display chinese characters
LED
- FPGA中实现led流水灯,通过Verilog语言编程,程序中调用了xilinx公司提供的时钟分频IP CORE-This file is to achiece led like water
LED
- LED等循环点亮,verilog实现功能-LED lights light cycle, verilog to achieve functional
led
- 实现跑马灯的verilog程序 更方便的学习 适合初学者的程序 通俗易懂-Marquee realize verilog program easier to learn for beginners program straightaway
LED
- 这是一个流水灯的Verilog代码,非常好,很详细。-This is a useful verilog code
scan-led
- 7段共阳极数码管,译码显示,Verilog HDL程序-Code based on Verilog HDL
led
- 入门级verilog编写的led点灯程序-Entry-level verilog prepared by the led lighting program
Verilog-IIC-read-MPU6050-Filter
- 本代码实现了读MPU6050 三轴6个数据,用其中的GY和AZ、AX结合融合滤波算法,解出X单轴角度,并在黑金开发板的EP4C15F17C8芯片上调试成功,±5°范围内LED灯灭,左右摆动时相应左右灯亮。 顶层模块每隔5ms,发出一个is_read高电平,下面的模块读取一次数据,并计算,更新LED状态。有关计算都用的ip核,占用资源很大。希望对小小小小白有所帮助。 -Verilog codes read 6 axis data of MPU6050, and use GY AZ AX w